Nov 01, 2017
Todd Havekost, Senior z/OS Performance Consultant at IntelliMagic, has received the Best Paper Award for his technical paper ‘Achieving CPU (& MLC) Savings through Optimizing Processor Cache’. The paper will be presented on November 9th, at the 2017 CMG imPACt Conference held in New Orleans, Louisiana.
The award-winning paper focuses on how effective utilization of processor cache is critical to achieve rated CPU capacity for z13 and z14 processors. Using numerous case studies, Todd reveals enlightening metrics available from the SMF 113 records and best practices to optimize cache efficiency and execute the workloads using fewer MSU’s, thereby reducing MLC software expense.
Mainframe software charges are typically the single biggest expense item for mainframe environments, and optimizing processor cache frequently provides opportunities to safely reduce costs without any negative performance ramifications.
For those who are unable to attend CMG imPACt, IntelliMagic will host a Webinar based on Todd’s paper. “Achieving CPU (& MLC) Savings on z13 and z14 by Optimizing Processor Cache” will be hosted on December 7th, from 1:00 PM – 2:00 PM ET. Register here.
During the webinar, Todd will discuss how to interpret the SMF 113 metrics to optimize your environment and reduce CPU consumption and MLC software expense. He will reflect findings from analyzing detailed processor cache data from analysis at over 50 z/OS sites. Beginning with z13 processors and continuing with z14s, customer experiences have confirmed that delivered capacity is more dependent than ever before on effective utilization of processor cache.
For more information on how to improve availability and performance, as well as optimize MLC for z/OS environments using new visibility into SMF and RMF data, visit IntelliMagic.com/mlc or contact IntelliMagic at email@example.com.
About The Computer Measurement Group
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